- USB-C 5V Power in (only rev. 3)
- high-density, low-power Efinix® Quantum® architecture TRION T20Q100F3 (20K LE) FPGA.
- 16Mb SPI INTERNAL flash + 16Mb SPI External flash (bitstreams protecting feature).
- 50Mhz External SMD oscillator (for PLL).
- Dual Flexible device configuration.
— Standard SPI interface (active, passive, and daisy chain)
— JTAG interface - Raspberry PI 40 pin conn.
- Microchip Crypto Authenticator IC.
- Pushbuttons and User LEDS.
- 34 I/O 3.3V signals with single ESD protection diode.
- selectable I2C port (HEXBERRY or Raspberry Pi set as Master).
- Power & status Led.
- completely OPEN SOURCE project.
- dimensions 65 x 40 mm
Fully supported by 
, a FREE licensable RTL-to-bitstream compiler:
Project management to keep your design files organized.
Dashboard to run the tool flow automatically or manually.
VHDL, Verilog HDL and SystemVerilog languages.
Constrain logic and assign pins to blocks in the device periphery.
Configure and add buildling blocks to your project.
Browse through your design's logic and routing placement.
Displays and analyzes your design's netlist.
Browse timing and perform static timing analysis.
Supports simulation flows using the ModelSim, NCSim, or free iVerilog simulators.
Update initial BRAM without performing a full compile.
Use scripts to build your design's interface.
Assign logic to package pins and view the pinout graphically.
Integrated hardware Debugger with Logic Analyzer and Virtual I/O debug cores.
GUI and command-line Programmer to configure your FPGA.
Sends JTAG command to an FPGA.